Current amplifier circuit and a current amplifying type differential current converter circuit

ABSTRACT

A current amplifier circuit includes a first, second, third and fourth transistor, each having the same polarity. The first transistor is connected in series with the second transistor and both have the collector and base thereof electrically connected. The third and fourth transistors are connected in series and the fourth transistor has a resistor connected between the base and collector. The third transistor has its base connected to the collector of the first transistor. A bias current is applied to the collector of the first transistor and an input current to be amplified is applied to the base of the fourth transistor. An amplified output current is obtained across the collector to emitter of the third transistor. In a differential amplifier circuit, a fifth transistor having the same polarity is connected with its base connected to the collector of the fourth transistor through a resistor. Additionally a resistor is connected between the base of the third transistor and the collector of the first transistor. The differential current outputs are taken across the third transistor and fifth transistor.

BACKGROUND OF THE INVENTION

This invention relates to a current amplifier circuit and a currentamplifying type differential amplifier converter circuit.

Conventionally, there is a current amplifier circuit, for example, shownin FIG. 5. In operation, if bias currents flowing through transistorsT₆, T₇ and transistors T₈, T₉ are represented by I, I_(B) and I_(X),respectively, the base voltage of transistor T₈ is given by

    2·(KT/q·I/I.sub.S)

where K is the Bolzmann constant, T is an absolute temperature, q is theelectron charge and I_(S) is the collector reverse saturation current.When T=300° K., KT/q=2·26·10⁻³, and the base voltage of the transistorT₈ is given by

    2·(26·10.sup.-3 ln I/I.sub.S)=26·10.sup.-3 ·(ln I.sub.B /I.sub.S +ln I.sub.X /I) ln (I/I.sub.S).sup.2 =ln I.sub.B I.sub.X /I.sub.S.sup.2

Rearranging this equation as I_(B) =I_(X) /hFE,

    I.sup.2 =I.sub.X.sup.2 /hFE

    Then

    I.sub.X =I√hFE

Thus the biasing current I_(X) flowing through transistor T₈ is √hFEtimes as large as the biasing current I.

The current gain is approximately hFE/2 if an input current isrepresented by i.

In the above circuit arrangement, the biasing current I_(X) and thecurrent gain are greatly dependent on hFE and influenced by variationsin the elements used, so that the arrangement is difficult to design andnot suitable for integration.

The object of this invention is to provide a current amplifier circuitand a current amplifying type differential current converter circuit inwhich the biasing current and the current gain are less dependent on hFEand not influenced by variation in the elements used.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an electric circuit diagram showing one example of an electricamplifier circuit according to this invention.

FIG. 2 is an electric circuit diagram showing another embodiment.

FIG. 3 is an electric circuit diagram showing one example of an electriccurrent amplifier differential current converter circuit.

FIG. 4 is an electric circuit diagram showing another embodiment.

FIG. 5 is an electric circuit diagram showing one example ofconventional current amplifier circuits.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

In FIG. 1, a first transistor T₁ in diode connection is connected inseries with a second transistor T₂ in diode connection and having aresistor R₁ connected across the collector and base thereof. Thecollector of transistor T₁ is connected to the base of a thirdtransistor T₃. A fourth transistor T₄ with a resistor R₂ across thecollector and base thereof is connected in series with transistor T₃.

In the above arrangement, if the biasing currents flowing throughtransistors T₁, T₂ are shown by I and biasing currents flowing throughtransistors T₃, T₄ are shown by I_(X), the base potential of transistorT₃ is given by

    26·10.sup.-3 ln I/I.sub.S +26·10.sup.-3 ln I/I.sub.S +RI/hFE=26·10.sup.-3 ln I.sub.X /I.sub.S +26·10.sup.-3 ln I.sub.X /I.sub.S +RI.sub.X /hFE

wherein R₁ =R₂ =R. Therefore,

    2·26·10.sup.-3 ln I/I.sub.X =(I.sub.X -I)·R/hFE

when I_(X) =I, the right and left sides are equal. Namely, the currentsflowing through transistors T₃, T₄ are equal to those flowing throughtransistors T₁, T₂.

If an input current applied to the base of transistor T₄ is shown by i,it is divided into i₁, i₂, namely,

    i=i.sub.1 +i.sub.2

Thus a signal current component I_(cs) of the collector current flowingthrough transistor T₄ is given by

    I.sub.cs =hFE·i.sub.1

A voltage drop across the emitter resistance RE of each of transistorsT₃, T₄ due to this current is given by

    2R·I.sub.cs =2R.sub.E ·hFE·i.sub.1

wherein R_(E) is the AC emitter resistance of transistor T₃ and R=R₁=R₂.

This voltage drop serves to reduce the voltage applied to resistor R tothereby reduce the current flowing through resistor R₂. This reducedportion equals current i₂, then

    i.sub.2 =2R.sub.E hFE·i.sub.1 /R

The current gain of this circuit is given by ##EQU1##

When hFE is large, Ics/i becomes approximately R_(E) and hence the gainis determined irrespective of hFE. Accordingly, current Ix flowingthrough the collector of transistor T₃ can be represented as ##EQU2##when R<<hFE

As just described above, the biasing current and current gain of thecircuit according to this invention are not dependent on hFE of thetransistors, so that the circuit is easy to design and suitable forintegration.

FIG. 2 shows another embodiment which includes a circuit obtained byeliminating resistor R₁ from the structure of FIG. 1. This circuit alsoprovides substantially the same effect as the first mentioned embodimentexcept for biasing currents I and Ix given by

    I/I.sub.x =Exp ((R.sub.2 I.sub.x /hFE)/2·26·10.sup.-3)

when R₂ =0, I=I_(x).

A current amplifying type differential current converter circuitconstructed by utilizing the above techniques will now be described. InFIG. 3, first and second transistors T₁, T₂ are in diode connectionthrough resistors R₃ and R₁, respectively. The collector of transistorT₁ is connected through a resistor R₄ to the base of third transistor T₃to which a fourth transistor T₄ in diode connection through resistor R₂is connected in series with transistor T₃. The collector of transistorT₄ is connected through a resistor R₅ to the base of a fifth transistorT₅.

In the above arrangement, if the biasing currents flowing throughtransistors T₁, T₃, T₅ are shown by I, I₁, I₂, respectively, thecollector voltage of transistor T₁ is given by ##EQU3## when R₁ =R₂ =R₃=R₄ =R₅ =R.

The collector voltage of transistor T₄ is given by

    26·10.sup.-3 ln I.sub.1 /I.sub.S +RI.sub.1 /hFE26·10.sup.-3 ln I.sub.2 /I.sub.S +RI.sub.2 /hFE (2)

Rearranging this equation,

    26·10.sup.-3 ln I.sub.1 /I.sub.2 =R·(I.sub.2 -I.sub.1)/hFE                                             (3)

This equation holds when I₁ =I₂, so that I₁ =I₂. Substituting this intoequation (1),

    2(26·10.sup.-3 ln I/I.sub.1)=2·R(I.sub.1 -I)/hFE (4)

This equation holds when I₁ =I, so that I₁ =I.

Namely, biasing currents I, I₁, I₂ are equal currents.

If a signal current i is applied to the base of transistor T₄, it isdivided into i₁ and i₂. If the emitter resistances of transistors T₃ andT₄ are shown by R_(E), then

    i.sub.2 =(i.sub.1 hFE·2R.sub.E +R·i.sub.1 hFE/hFE)/R (5)

    i=i.sub.1 +i.sub.2                                         (6)

Substituting equation (6) into (5) and eliminating i₂,

    i=2i.sub.1 +(i.sub.1 ·hFE·2R.sub.E)/R    (7)

    LU i.sub.i /i=1/(2+(2R.sub.E ·hFE)/R)             (8)

Since the current flowing through transistor T₄ is hFE·i, the currentgain of transistor T₄ is given by

    i.sub.1 hFE/i=hFE/(2R.sub.E ·hFE)/R)              (9)

In this equation, as hFE increases, the current gain becomesapproximately R/2R_(E).

If the amplified current is given by I_(a), the signal current I_(x)flowing through transistor T5 is given by ##EQU4## from the relationshipwith the collector voltage of transistor T₁. Transforming this equation,

    26·10.sup.-3 ln I.sup.2 /(I+I.sub.a)(I+I.sub.x)=R/hFE(I+I.sub.a +I+I.sub.x -2I)                                           (11)

When currents I_(a), I_(x) are at a small-signal level, the equation(11) holds when I_(x=-I) _(a). Therefore, I_(x) =-I_(a), so that acurrent flows through transistor T₅, which current has a phase oppositeto that of a signal current flowing through transistor T₄.

Accordingly, collector current I₁ of the transistor T₄ and collectorcurrent I₂ of the transistor T₅ are represented as,

    I.sub.1 =I+I.sub.a =i+R/(2R.sub.E)i

    I.sub.2 =I+I.sub.x =I-I.sub.a ≈I-Ri/2R.sub.E

Thus, the above arrangement provides an electric current amplifying typedifferential conversion circuit.

FIG. 4 shows an embodiment in which transistors T₁, T₂ have no resistorsacross the bases and emitters thereof and have an effect similar to thatof the previous embodiment. In this circuit, the relationship betweenbiasing currents I, I₁, and I₂ is given by

    I.sub.1 =I.sub.2

    I/I.sub.1 =Exp (R·I.sub.1 /26·10.sup.-3 hFE) (12)

When R=R₂ =R₄ =R₅ =0, I=I₁.

According to this invention, the biasing currents and the current gainare less dependent on hFE, and less influenced by variations in thecomponents, so that the circuit is easy to design and is suitable forintegration.

I claim:
 1. An electric current amplifier circuit comprising: a first, asecond, a third and a fourth transistor each having the same polarity,wherein the first transistor has an electrically connected collector andbase and is connected in series with the second transistor having anelectrically connected collector and base, wherein the collector of thefirst transistor is connected to a base of the third transistor, whereinthe fourth transistor has an emitter with a resistance R_(E) and acollector and base connected through a resistor having a resistance Rand the fourth transistor is connected in series with the thirdtransistor, wherein the first transistor is receptive of a bias currentI flowing therethrough, and wherein the base of the fourth transistor isreceptive of an input signal current i supplied thereto to produce anamplified output signal current approximately I+R·i/2R_(E) flowingthrough the third transistor.
 2. An electric current amplifier circuitaccording to claim 1, wherein the collector and the base of the firsttransistor are directly electrically connected and the collector and thebase of the second transistor are electrically connected through aresistor.
 3. An electric current amplifier circuit according to claim 1,wherein the collector and the base of the first transistor are directlyelectrically connected and the collector and the base of the secondtransistor are directly electrically connected.
 4. An electrical currentamplifier circuit according to claim 1, wherein the first transistor hasan emitter connected to the collector of the second transistor to effectthe series connection thereof and wherein the third transistor has anemitter connected to the collector of the fourth transistor to effectthe series connection thereof.
 5. An electric current amplifying typedifferential current conversion circuit comprising a first, a second, athird, a fourth and a fifth transistor, each having the same polarity,wherein the first transistor has an electrically connected collector andbase and is connected in series with the second transistor having anelectrically connected collector and base, wherein the collector of thefirst transistor is connected to a base of the third transistor througha first resistor, wherein the fourth transistor has an emitter with aresistance R_(E) and a collector and base connected through a secondresistor, wherein the fourth transistor is connected in series with thethird transistor, wherein the fifth transistor has a base connected tothe collector of the fourth transistor through a third resistor whereinthe resistance of the first, second and third resistors is R, whereinthe first transistor is receptive of a bias current I flowingtherethrough and wherein the base of the fourth transistor is receptiveof an input signal current i to produce differential amplified outputsignal currents of approximately I+R·i/2R_(E), I-R·i/2R_(E), flowingthrough the third transistor and the fifth transistor respectively. 6.An electric current amplifying type differential current conversioncircuit according to claim 5, wherein the collector and the base of thefirst transistor are electrically connected through a resistor and thecollector and the base of the second transistor are electricallyconnected through a resistor.
 7. An electric current amplifying typedifferential current conversion circuit according to claim 5, whereinthe collector and the base of the first transistor are directlyelectrically connected and the collector and the base of the secondtransistor are directly electrically connected.
 8. An electrical currentamplifying type differential current conversion circuit according toclaim 5, wherein the first transistor has an emitter connected to thecollector of the second transistor to effect the series connectionthereof and wherein the third transistor has an emitter connected to thecollector of the fourth transistor to effect the series connectionthereof.
 9. A current amplifier circuit comprising:first and secondseries connected transistors having the same polarity and each having anelectrically connected base and collector; third and fourth seriesconnected transistors having the same polarity as the first and secondtransistors, wherein the third transistor has a base connected to thecollector of the first transistor and the fourth transistor has acollector and a base and a resistor having a resistance R connectedbetween the collector and base thereof; means for applying a biascurrent I to the collector of the first transistor; input means forapplying input current i to be amplified to the base of the fourthtransistor; and output means for providing an amplified output currentacross a collector and emitter of the third transistor.
 10. The circuitaccording to claim 9, wherein the fourth transistor has an emitterresistance of R_(E) and the output current is approximatelyI+R·i/2R_(E).
 11. The circuit according to claim 9, wherein the base andcollector of the first transistor are directly connected and wherein thebase and collector of the second transistor are connected through aresistor.
 12. The circuit according to claim 9, wherein the base andcollector of the first transistor are directly connected and wherein thebase and collector of the second transistor are directly connected. 13.The circuit according to claim 9, wherein the first transistor has anemitter connected to the collector of the second transistor to effectthe series connection thereof and wherein the third transistor has anemitter connected to the collector of the fourth transistor to effectthe series connection thereof.
 14. A differential current amplifiercircuit comprising:first and second series connected transistors havingthe same polarity and each having an electrically connected base andcollector; third and fourth series connected transistors having the samepolarity as the first and second transistors, wherein the thirdtransistor has a base connected to the collector of the first transistorthrough a first resistor and the fourth transistor has a collector and abase and a second resistor connected between the collector and basethereof; a fifth transistor having the same polarity as the first andsecond transistors and a base connected to the collector of the fourthtransistor through a third resistor; means for applying a bias current Ito the collector of the first transistor; input means for applying inputcurrent i to be amplified to the base of the fourth transistor; andoutput means for providing two amplified differential output currentacross a collector and emitter of the third transistor and the fifthtransistor.
 15. The circuit according to claim 14, wherein the first,second and third resistors have a resistance R and wherein the fourthtransistor has an emitter resistance of R_(E) and the differentialoutput currents across the third and fifth transistors respectively areapproximately I+R·i/2R_(E) and I-R·i/2R_(E).
 16. The circuit accordingto claim 14, wherein the base and collector of the first transistor areconnected through a resistor and wherein the base and collector of thesecond transistor are connected through a resistor.
 17. The circuitaccording to claim 14, wherein the base and collector of the firsttransistor are directly connected and wherein the base and collector ofthe second transistor are directly connected.
 18. The circuit accordingto claim 14, wherein the first transistor has an emitter connected tothe collector of the second transistor to effect the series connectionthereof and wherein the third transistor has an emitter connected to thecollector of the fourth transistor to effect the series connectionthereof.